JPH0346855B2 - - Google Patents
Info
- Publication number
- JPH0346855B2 JPH0346855B2 JP58057037A JP5703783A JPH0346855B2 JP H0346855 B2 JPH0346855 B2 JP H0346855B2 JP 58057037 A JP58057037 A JP 58057037A JP 5703783 A JP5703783 A JP 5703783A JP H0346855 B2 JPH0346855 B2 JP H0346855B2
- Authority
- JP
- Japan
- Prior art keywords
- mpu
- microprocessor
- direct memory
- memory access
- mem
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/30—Monitoring
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
- G06F11/0706—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment
- G06F11/073—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment in a memory management context, e.g. virtual memory or cache management
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Quality & Reliability (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Debugging And Monitoring (AREA)
- Bus Control (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP58057037A JPS59183447A (ja) | 1983-04-01 | 1983-04-01 | 障害監視方式 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP58057037A JPS59183447A (ja) | 1983-04-01 | 1983-04-01 | 障害監視方式 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS59183447A JPS59183447A (ja) | 1984-10-18 |
JPH0346855B2 true JPH0346855B2 (en]) | 1991-07-17 |
Family
ID=13044241
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP58057037A Granted JPS59183447A (ja) | 1983-04-01 | 1983-04-01 | 障害監視方式 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS59183447A (en]) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0746318B2 (ja) * | 1987-01-23 | 1995-05-17 | 日本電気株式会社 | マイクロコンピユ−タ開発支援装置 |
JP2579003B2 (ja) * | 1989-11-30 | 1997-02-05 | 松下電送株式会社 | メモリ間データ転送装置 |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS55116124A (en) * | 1979-03-01 | 1980-09-06 | Nippon Telegr & Teleph Corp <Ntt> | Information processor |
JPS5671129A (en) * | 1979-11-15 | 1981-06-13 | Fujitsu Ltd | Data processing system |
DE3104903C2 (de) * | 1981-02-11 | 1986-05-15 | Siemens AG, 1000 Berlin und 8000 München | Anordnung zum Datenaustausch zwischen parallel arbeitenden Mikrorechnern |
-
1983
- 1983-04-01 JP JP58057037A patent/JPS59183447A/ja active Granted
Also Published As
Publication number | Publication date |
---|---|
JPS59183447A (ja) | 1984-10-18 |
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